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Are you designing two-layer PCBs? Then you need to read this further…
While reviewing hardware designs for clients, one of the most common mistakes I often see is the use of two-layer Printed Circuit Boards with both layers used for signals, without the presence of a return reference plane.
Unfortunately, for those wanting to save money on the PCB stackup, this is the number one cause of EMI and Signal Integrity failure that you are going to encounter.
The problem with this stackup, as you can see here, is that the fields are uncontained and are spreading around, contaminating each other's signals.
The money you think you're going to save from choosing this stackup will need to be used to repeat the EMC tests until you find a solution that will allow you to pass the test.
This also means that you might need to repeat the tests until you find a solution, which in my view is far more expensive than choosing the right stackup in the first place.
Additionally, you will have to use the “saved” money (plus some more) to cover the expenses of the newly implemented solution, not only during the prototyping to pass the EMC test, but also for the whole production.
I doubt this is going to be a cheap solution, considering the limited amount of solutions that you will have available at this late stage of the development.
The right solution?
Don’t fall into this trap in the first place.
Choose the right stackup to begin with, and you’ll improve the EMC results tenfold, as well as the signal integrity performance and robustness of the entire system.
I hope this helps,
Dario