
Action list:
In this lesson, we will explore the intricacies of building a power delivery network (PDN), with a specific focus on maintaining electromagnetic interference (EMI) integrity for the digital circuits we design. Before diving into the construction of a power delivery network, it is essential to first understand the key requirements of such a system.
Defining the requirements upfront is crucial, as it ensures that the network will function properly once implemented. Much like any other system, specifying what is needed at the outset guides the entire process, ensuring that the final product performs as expected.
The primary requirement of a power delivery network is to provide a constant and uninterrupted DC voltage source to the load. This stability is critical for ensuring smooth operation of the components within the system, particularly for processors or microcontrollers that must function without interruption.
The PDN must supply a consistent voltage source to the load, which in most cases are integrated circuits (ICs). If the voltage supply fluctuates or is interrupted, the performance of these ICs may degrade, leading to potential failures in the system.
Another important requirement is the minimization of any AC noise within the power delivery network. AC noise, if not controlled, can propagate through the entire network, leading to signal integrity issues that affect other ICs or components within the system.
Beyond internal signal interference, this noise can also generate EMI problems, either by coupling with cables or by radiating outward and impacting the performance of nearby electronics. Properly managing this noise is essential to ensuring the reliability and stability of the entire PDN.
The next requirement we must consider is the goal of achieving zero ohms AC impedance between the power source and the return reference plane. This is essential for maintaining the integrity of the power delivery network. One key method to meet this requirement is by selecting the right decoupling strategy.
But what exactly do we mean by decoupling?
In this context, decoupling involves using capacitors strategically to ensure that the power delivery network functions smoothly under varying conditions.
Decoupling capacitors serve several important functions. One of the primary purposes is to minimize the dependency between different integrated circuits (ICs) in the system. This is critical because ICs often have different power requirements, and ensuring they don’t interfere with each other is vital for stable operation.
To illustrate, imagine two processors in a system, one demanding high transient currents from the power delivery network while the other also requires transient currents at the same time. If the network cannot meet these simultaneous demands, voltage dips occur, leading to disruptions in the operation of the processors.
In some cases, these processors may shut down or experience momentary failures, which is something we want to avoid. By selecting an effective decoupling strategy, we reduce this dependency between ICs, allowing each one to operate independently without affecting the other.
Choosing the right decoupling capacitors helps in two ways. First, it isolates one IC from another, minimizing cross-dependency. Second, it reduces the impedance between the power source and the return reference plane. This is especially important for digital circuits, which are composed of logic gates.
These logic gates need to switch rapidly in order to generate the required digital signals, and such fast switching events demand transient current from the power delivery network. Whenever these logic gates switch, the ICs require transient current to power the switching process.
This current flows through the power delivery network and encounters impedance along the way. The greater the distance from the power source, the higher the impedance, which can cause voltage drops that hinder performance. To maintain the required voltage levels, we must work to reduce this impedance as much as possible. Reducing impedance also reduces the voltage drop caused by the current flowing through the network, ensuring more stable power delivery.
It’s important to think beyond just the resistance of the copper traces in the power network. While resistance is certainly a factor, the more significant issues often arise from inductance and capacitance within the system. Inductance, in particular, plays a critical role in determining how much impedance exists between the power source and the load. Managing inductance effectively is key to maintaining the performance of the power delivery network.
This is important because transient currents generated during the switching of logic gates are tied to specific frequencies. The inductance within the power delivery network (PDN) is frequency-dependent, meaning that at higher frequencies, the inductive effects become more pronounced.
Consequently, the voltage drops caused by these transient currents can become problematic not just for a single IC, but for all ICs connected to the same power delivery network. If one IC experiences a voltage drop, the others in the network may be impacted as well, leading to potential system instability.
Another key issue related to transient currents is the formation of current loops between the power source, the load, and the return reference plane. These loops can act as highly effective antennas, radiating electromagnetic interference (EMI) throughout the system.
To reduce the voltage noise generated by transient currents, we have two primary options. The first is to reduce the magnitude of the transient current itself, but doing so would negatively affect the system’s timing and overall efficiency, which is not an ideal solution. The second, and more practical approach, is to minimize the impedance of the power delivery network, with a specific focus on reducing the inductance. As designers, we have the greatest influence on the PDN's performance by reducing its inductance.
While we cannot fundamentally alter the transient current requirements of the system, we can optimize the power delivery path by designing it with the lowest possible inductance and resistance. One effective strategy is to implement return reference planes and carefully engineer the power path to minimize impedance.
One of the most efficient methods to improve PDN performance is by reducing the size of the current loops created between the power source and the load. By shortening these loops, we minimize inductive losses and improve overall power delivery efficiency. To achieve this, we need to bring the power source as close to the load as possible. This is where decoupling capacitors play a critical role.
Using decoupling capacitors strategically allows us to position a localized source of energy near the IC. By placing these capacitors close to the IC, we effectively reduce the inductance between the capacitors and the IC, minimizing the impedance of the traces. This, in turn, ensures that transient currents can be delivered quickly and efficiently, reducing the likelihood of voltage drops and improving the stability of the entire power delivery network.