I keep seeing this recommendation for low EMI from many PCB designers, including those with more experience, who say that having a power plane instead of a Return Reference Plane (RRP) adjacent to the signal layers makes no difference for the return current and actually helps reduce emissions.
However, as the image below hopefully illustrates, having a plane that differs from the RRP between the signal layer and the RRP does make a difference, and is not the best choice when it comes to EMI.
The first issue is that, as we know, current always flows in a loop, and this means that the return current must return to the source it originated from.
Since the power plane and the RRP are not DC-linked (short-circuit), the current has to take a longer path, crossing an extra layer via displacement current, before it can finally close the loop, and reach the source pin.
But the spaces between the layers and the additional return path introduce impedance.
This results in the return current generating an extra voltage drop, which depends on this added impedance, and the current flowing through it.
This is simply noise in the return path, which not only can cause common mode current, but can also lead to crosstalk between signals transitioning between layers, easily turning into emissions from the board.
This is why I do not recommend using the following 4-layer stack-up, especially for high-speed signals:
- L1: Signal
- L2: Power
- L3: "Ground"
- L4: Signal
To me, this is definitely a second choice, and requires a good understanding of the physics involved if used.
I hope this helps,
Dario
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