In this article, we are going to explore what happens when, instead of a return reference plane, we have another signal trace in the layer stackup. Unfortunately, this topology is becoming increasingly common.
The reason for this is often a lack of understanding of the concepts of fields and signals among designers. Sometimes, stakeholders who do not grasp how electromagnetic fields or printed circuit boards behave, make decisions about the stackup design.
When a PCB design uses two conductive layers, both dedicated to signal traces, we encounter a scenario like the one illustrated in the image here:
In this scenario, the fields from both signal traces are spreading out and interfering with each other. This situation exemplifies a classic mistake in printed circuit board (PCB) design—something that should be avoided at all costs.
I cannot emphasize this enough:
DO NOT CHOOSE THIS TYPE OF STACKUP!
Why is this so critical?
As explained earlier, the fields are no longer confined to a specific area. Instead, they are expanding outward from both signal traces. This means that not only do the fields from one signal trace interfere with the fields from the other, but they also contribute to further expansion of the electromagnetic fields.
The result is a significant increase in electromagnetic interference (EMI), which is precisely what we aim to prevent in low-EMI PCB design. The primary goal of PCB design for low EMI is to contain the fields, preventing them from spreading outwards.
However, with this type of stackup, the fields are doing the opposite—they're expanding and interacting, leading to higher levels of EMI and also Signal Integrity problems. This design approach is counterproductive to what we are trying to achieve.
To address this problem, designers often attempt to compensate by adding copper to both layers and connecting it to “ground” pins.
These copper areas, often referred to as copper pours or copper fills, are placed adjacent to the signal traces rather than directly above or below them. While this strategy might seem like a potential solution, it doesn't effectively resolve the underlying issue of field containment.
This strategy, unfortunately, fails to provide the correct reference potential to the fields and also does not offer a proper path for the return currents. As we will explore later in this course, the absence of an adequate return path can lead to several issues, including the generation of common mode currents. These currents are particularly problematic because they are highly effective at radiating electromagnetic energy, which contributes to unwanted emissions.
Microstrips
Now, let’s explore the topologies that we will use when designing printed circuit boards.
The most common topology is the one we discussed earlier, where the signal line is adjacent to a return reference plane (RRP). This configuration is known as the microstrip topology.
In a microstrip topology, the signal layer can be positioned either on the top or bottom of the board, with the return reference plane on the opposite side.
For example, you could have the signal line on the top layer with the reference plane beneath it, or you could reverse this, placing the signal on the bottom layer and the reference plane above.
What’s crucial in this topology is that the return reference plane is directly adjacent to the signal layer and positioned as close as possible to ensure that the electromagnetic fields are well-contained.
This containment of fields is essential for minimizing electromagnetic interference (EMI) and achieving a design that meets electromagnetic compatibility (EMC) requirements.
Strip lines
The other topology we use is known as the stripline. In this configuration, the return reference plane (RRP) is adjacent to both sides of the signal layer. When the planes are symmetrically placed with respect to the signal layer, both provide equal reference potential to the signal trace, effectively containing the fields on both sides.
This symmetry ensures that the electromagnetic fields are well-contained, reducing the chances of radiating unwanted energy and minimizing electromagnetic interference (EMI).
By having reference planes on both sides of the signal, the stripline topology provides excellent field containment compared to the microstrip topology, where the field containment is primarily on one side.
However, this topology requires an additional layer in the PCB stackup, which increases the overall cost of PCB fabrication.
Despite the extra cost, the enhanced field containment and improved EMI performance make stripline topology a valuable option for designs where minimizing interference is critical, especially with high frequency design.
Co-planar waveguide
Another important topology is the coplanar waveguide. In this configuration, not only do we have a return reference plane adjacent to the signal trace, but we also provide return and reference at the sides of the signal trace.
This topology is particularly popular in RF circuits due to its ability to tightly control the electromagnetic fields around the signal.
A coplanar waveguide essentially consists of two return reference traces or planes that run adjacent to the signal trace. These are then connected, or "stitched," to the return reference plane using vias.
By surrounding the signal trace with return and reference structures on multiple sides, this topology offers even better field containment than the microstrip or stripline configurations.
It’s important to note that the poorly designed, non-recommended topology we discussed earlier (where copper pours are placed near signal traces) is essentially a cheaper and less effective modification of the coplanar waveguide structure.
This modified version often leads to issues because it does not provide proper field containment and can result in increased electromagnetic interference (EMI).
The true coplanar waveguide topology, however, is more advanced and requires careful design. If not implemented correctly, it can create resonances between the cavities formed by vias and the spaces between traces.
These resonances can lead to additional emission problems, undermining the very benefits this topology is supposed to provide.
Therefore, while the coplanar waveguide is highly effective for field containment when used properly, it also demands precision in design to avoid potential issues that could lead to EMC test failures or other performance problems.
I hope this helps,
Dario
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