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In this lesson, we will take a closer look at how the return current in a circuit behaves as the frequency changes and how these changes affect the layout of a printed circuit board (PCB). We will also examine how these variations can influence key aspects such as electromagnetic compatibility (EMC) and signal integrity.
Understanding how frequency impacts the return current is essential for designing PCBs that perform well in different conditions and meet necessary standards. By gaining insight into these factors, we can make better decisions in the design process, ensuring that our boards work efficiently and reliably.
Let’s start by looking at a simulation created with Simbeor ®, a specialized software for electromagnetic and signal integrity simulations. In this simulation, we see a signal trace on the top layer of the PCB and a return reference plane positioned directly underneath it.
This simulation essentially replicates the conditions encountered when designing a PCB, as shown in this example in Figure 2. In this case, we have the top layer, where the signal traces are placed (shown in red), and beneath it, a return plane (shown in green).
This return plane is continuous and uninterrupted, without any cuts, splits, or breaks. It provides a solid reference for the signals on the top layer, ensuring that the return path for the signals remains consistent and well-defined throughout the PCB.
To explore how signals behave when operating at different frequencies, we’ll examine two distinct signal frequencies: one at 1 GHz and another at 10 kHz. Observing these signals will help us understand how return currents behave under varying circumstances.
When we are dealing with low-frequency signals, such as 10 kHz, the return current tends to follow the path of least resistance, which is typically the shortest path to the source. In this case, the impedance is more resistive than reactive, meaning that the signal has less inductive reactance to overcome, and the return current can easily flow back along the shortest available path.
In contrast, with high-frequency signals like 1 GHz, the return current behaves differently. As the frequency increases, the reactive component of the impedance becomes more pronounced, and the return current tries to flow as close as possible to the signal trace.
This is because high-frequency currents are more affected by inductance, and to minimize this inductive effect, the return current will stay close to the signal trace, following a path that minimizes reactance.
It is essential to keep in mind that current always flows in loops, which means that for every signal trace, there is a corresponding return path. The current follows this loop, traveling from the signal trace, through the return plane, and back to the source. As the frequency of the signal increases, the return current follows a tighter loop, staying closer to the signal trace. This distinction between low-frequency and high-frequency signals is important for PCB layout design because the layout needs to account for these changes in return current behavior.
🔓 The return reference plane, must be located in an adjacent layer and as close as possible to the signal layer.
It’s also important to understand the potential issues that arise when signals of different frequencies are placed too close to one another. If a high-frequency signal and a low-frequency signal are placed next to each other, the return current for the low-frequency signal might attempt to take shortcuts, flowing around the high-frequency signal's trace. This can result in unwanted interference and signal integrity problems, including ground bounce and crosstalk, which can affect the performance of the entire circuit.
Let’s now look at what happens when the trace length increases.
For the 1 GHz signal, the return current stays closely coupled with the trace, as it seeks the shortest possible path to the source.
However, when the frequency is reduced to 10 kHz, the return current spreads out more across the return plane. This occurs because the lower frequency signal is less dependent on inductance. As a result, the return current expands, occupying a larger area of the return reference plane. This can be seen in the small green arrows, which show the return current occupying most of the return and reference plane.
Introducing a cut into the return reference plane, such as in this example, significantly affects the behavior of return currents. In this case, the signal trace extends across the plane, but the return reference plane contains a split or cut. This scenario is common in many PCB designs, where the signal layer on the top is paired with a return plane (or worst another signal trace) below that is not continuous and features such interruptions.
The issue arises when a signal trace crosses one of these splits in the return plane. Unlike a continuous plane, which allows the return current to flow directly under the signal trace, a split forces the current to find an alternative path, leading to increased impedance, and larger current loop.
To better understand this, the simulation below demonstrates the behavior of the return current when a trace crosses a split in the plane. The results highlight the effects of such discontinuities and underscore the importance of maintaining uninterrupted return paths in PCB layouts.
When running a 10 kHz signal, the return current is forced to take an indirect path around the discontinuity, creating a large return current loop (see green and yellow small arrows) as it flows back to the source.
This large loop introduces issues because not only does the return current create larger electromagnetic fields, but it also interacts with other signals that share the same layer as the return and reference layer. This can result in signal integrity problems, as the signal traces on the top layer are influenced by the return current below.
Shifting to a one-gigahertz signal demonstrates that, while the return path remains close to the trace initially, it is disrupted upon encountering the cut in the plane. The return current then diverts, causing, depending on the signals, and the slot, reflections and resonance within the cavity as it tries to flow back to the source. This back-and-forth resonance further amplifies potential interference and highlights the challenges posed by such plane cuts.
This behavior is the underlying cause of challenges not only in terms of signal integrity but also in EMC (electromagnetic compatibility). At this stage, the energy becomes uncontained, effectively turning the system into an antenna within the design, which can lead to further complications and inefficiencies. To avoid such complications, it is essential to maintain the integrity of the reference plane.
🔓 Cuts, splits, or any form of interruption should be strictly avoided in particular when trying to separate analog signals from digital signals!
WE DO NOT RECOMMEND USING A SEPARATE "GROUND!"
Each time we choose a stack-up, we ensure that the signals have a solid, uninterrupted return reference plane underneath. If this is not the case, the return current becomes compromised, which can lead to signal integrity issues and potential EMC problems.
Conclusion
Starting out in PCB design can be overwhelming, especially when the theoretical principles learned in traditional electrical engineering classes don’t always align with the hands-on demands of actual PCB layout. As a result, many designers find themselves struggling through a trial-and-error process to bridge this gap.
At fresuelectronics.com, we are committed to easing this process for you. Our goal is to help you avoid the common pitfalls and frustrations that come with mastering PCB design. Through the resources we provide, including guides, courses, and other learning tools, we aim to make your journey more efficient and less daunting.
We’re here to equip you with the knowledge and skills needed to excel in this field, offering you a solid foundation to build upon as you grow into a confident PCB designer.
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